Reporting to the Engineering Manager, you will be responsible for scoping and specifying FPGA hardware, coding, documenting, testing, integrating and verifying Simulink auto-coded HDL for DSP.
Mandatory Skill Requirements:
Hardware – Xilinx FPGA, RF Components
Software - Matlab Simulink (3 years practical Simulink experience). Simulink Coder, HDL coder, HDL verifier, Xilinx Vivado Design Suite, System Generator. HDL Coding
Tools and Methodologies – RF & EW modelling
Applications – (see software)
Markets – Defence
Other – Bachelor’s degree in a science or engineering discipline. SC Clearance. Prepared to travel frequently within the UK. Prepared to undertake DV clearance.
Desirable Skill Requirements:
Hardware – Military avionics and sensors. Systems engineering lifecycle.
Software – Five years practical Simulink experience C, C++
Tools and Methodologies – JIRA Agile Workflow. Testing and verification.
Other – Master’s degree in an engineering discipline. DV clearance.
This role is for a 3 month contract commencing January 2020.
MASS are an equal opportunities employer